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Published in:   Vol. 5 Issue 2 Date of Publication:   December 2016

Analysis of Impedance & Supply Noise for Power Distribution Networks in IC Using CM

M. Gayathri,V.Kulotharasan

Page(s):   40-42 ISSN:   2278-2397
DOI:   10.20894/IJCNES.103.005.002.003 Publisher:   Integrated Intelligent Research (IIR)

With increasing design complexity, as well as continued scaling of supplies, the design and analysis of power distribution networks poses a difficult problem in modern IC design. We propose several closed-form solutions for power distribution network optimization and analysis which explicitly take into consideration the mesh topology. An RLC model for on-chip power distribution networks is presented for array and wire bonded integrated circuits including inter block decoupling capacitors and impedances. One of the more common design techniques for power distribution networks (PDN) is the determination of the impedance & supply noise. Current-mode technique is used. By using this current mode technique noise and impedance, voltage is analyzed.